1. Field of the Invention
The present invention relates to a patterning process by a sidewall spacer method.
2. Description of the Related Art
In 1980s, photo-exposure using a g-beam (436 nm) or an i-beam (365 nm) of a mercury lamp as a light source had been widely used in the resist patterning. As a means for further miniaturization, shifting to a shorter wavelength of the exposure light was assumed to be effective, so that, in mass production process after the DRAM (Dynamic Random Access Memory) with 64 megabits (processing dimension of 0.25 μm or less) in 1990s, a KrF excimer laser (248 nm), a shorter wavelength than the i-beam (365 nm), had been used in place of the i-beam as the exposure light source.
However, in production of the DRAM with integration of 256 MB and 1 GB or higher which require further miniaturized process technologies (processing dimension of 0.2 μm or less), a light source with further short wavelength is required, and thus, a photolithography using an ArF excimer laser (193 nm) has been investigated seriously since about a decade ago. At first, the ArF lithography was planned to be applied to manufacturing of a device starting from a 180-nm node device, but the life of the KrF excimer lithography was prolonged to mass production of the 130-nm node device; and thus, a full-fledged application of the ArF lithography started from the 90-nm node. Further, mass production of the 65-nm node device is now underway by combining it with a lens having an increased NA till 0.9. Further shortening of wavelength of the exposure light is progressing in the next 45-nm node device; and for that, the F2-lithography with 157 nm wavelength became a candidate for it. However, there are many problems in the F2 lithography: cost-up of a scanner due to use of the large quantities of the expensive CaF2 single crystal for a projection lens; extremely poor sustainability of a soft pellicle, which leads to change of an optical system due to introduction of a hard pellicle; decrease in etching resistance of a resist film, and so forth. Because of these problems, development of the F2 lithography was suspended, and the ArF immersion lithography was introduced.
In the ArF immersion lithography, water having refractive index of 1.44 is introduced between a projection lens and a wafer by a partial fill method thereby enabling high speed scanning; and thus, mass production of the 45-nm node device is now underway by using a lens with a NA class of 1.3.
For the 32-nm node lithography technology, lithography with a vacuum ultraviolet beam (EUV) of 13.5 nm wavelength is considered to be a candidate. Problems to be solved in the EUV lithography are to obtain a higher output power of the laser, a higher sensitivity of the resist film, a higher resolution, a lower line edge roughness (LER), a non-defect MoSi laminate mask, a lower aberration of the reflective mirror, and so forth; and thus, there are mounting problems to be solved. Development of the immersion lithography with a high refractive index, another candidate for the 32-nm node, was suspended, because transmittance of LUAG, a candidate for a high refractive index lens, is low, and refractive index of the liquid could not reach an aimed value of 1.8. Accordingly, in the photo-exposure used as a general technology, resolution based on the wavelength of a light source is approaching to its inherent limit.
In recent years, a double patterning process, in which a pattern is formed by a first photo-exposure and development, and then a pattern is formed exactly in the space of the first patterns by a second photo-exposure, is drawing an attention as one miniaturization technology (Non-Patent Document 1). Many processes are proposed as to the double patterning process. For example, there is a method in which a photo resist pattern with a line-and-space interval of 1:3 is formed by a first photo-exposure and development, an underlying hard mask is processed by a dry etching, an another hard mask is formed on it, in a space formed by the first photo-exposure is formed a line pattern by photo-exposure and development of the photo mask layer, and then the hard mask is dry-etched to form a line-and-space pattern having a half width of the first pattern pitch. There is also another method in which a photo resist pattern with a line-and-space interval of 1:3 is formed by a first photo-exposure and development, an underlying hard mask is processed by dry etching, a photo resist layer is coated on it, photo-exposure of the second space pattern is made on a remaining part of the hard mask, and then the hard mask is processed by dry etching. In any of these methods, the hard mask is processed by two dry-etching processes.
In the former method, the hard mask needs to be formed twice. In the latter method, only one layer of the hard mask is needed, but a trench pattern, in which resolution is more difficult as compared with a line pattern, needs to be formed. In the latter method, a negative resist material may be used for the formation of the trench pattern. With this method, a high-contrast light similar to that used to form a line by a positive development pattern may be used. However, a negative resist material has a lower dissolution contrast as compared with a positive resist material, and thus, the negative resist material gives a lower resolution as compared with the case in which the line is formed by the positive resist material when the negative resist material is used to form the same dimension of the trench pattern. In the latter method, it may be conceivable to apply a thermal flow method in which a wide trench pattern is formed by using a positive resist material, and then the trench pattern is shrunk by heating a substrate, and a RELACS method in which a water-soluble layer is coated on a trench pattern after development, and then the trench is shrunk by a thermal crosslink of a resist layer surface. In these methods, however, there are problems of deterioration of a proximity bias and a low throughput due to the further complicated process.
In both of the former and the latter methods, two etchings are necessary in the substrate processing, thereby causing problems of a lower throughput as well as a deformation and misalignment of the pattern due to the two etchings.
To perform the etching only once, there is a method in which a negative resist material is used in the first photo-exposure and a positive resist material is used in the second photo-exposure. There is another method in which a positive resist material is used in the first photo-exposure and a negative resist material dissolved in a higher alcohol which has 4 or more carbon atoms and does not dissolve the positive resist material is used in the second photo-exposure. In these methods, the resolution is deteriorated due to the use of a negative resist material having a low resolution.
Other method in which a pattern formed by the first photo-exposure and development is treated with a reactive metal compound to insolubilize the pattern, and then the second pattern is newly formed between the first patterns by photo-exposure and development is proposed (Patent Document 1).
The most critical problem in the double patterning process like this is the overlay accuracy of the first and the second patterns. A magnitude of the position displacement leads to variation of the line dimension; and thus, for example, to form the 32-nm line with 10% accuracy, the overlay accuracy within 3.2 nm is necessary. Because the overlay accuracy of the present scanner is about 8 nm, a substantial improvement in accuracy is necessary.
Because of the problem of the overlay accuracy of a scanner and the difficulty to divide one pattern into two, a method in which a pitch is halved in a single photo-exposure is investigated. For example, a method in which a pitch is halved by forming films on both sides of a line pattern sidewall is proposed (Non-Patent Document 2). For this sidewall spacer method, a spacer space method, in which a hard mask of the resist underlayer and a film embedded into a space between films attached on its sidewall are used as an etching pattern, and a spacer line method, in which a film attached on a hard mask sidewall of the resist underlayer is used as an etching pattern, are proposed (Non-Patent Document 3).
Further, a sidewall spacer method in which a sidewall of SiO2, α-Si, α-C, or the like is formed to a core pattern by a CVD method, and then the core pattern is removed by dry etching thereby forming the sidewall pattern so that the pattern pitch is halved is proposed. However, in this method, heating temperature of 150° C. or higher is necessary to form the sidewall. Accordingly, if the resist pattern formed by photo-exposure was used as the core, the pattern was collapsed at this temperature; and thus, strength of the core was insufficient for the spacer. Because of this, a complicated process in which this resist pattern is transferred to the core material of SiO2 or α-C by dry etching and then the sidewall is formed to this has been used.
As mentioned above, as the pattern rule is progressing toward further miniaturization in recent years, a patterning process with which a further finer pattern can be formed conveniently and efficiently is wanted.